Journals in DBLP

IEEE Trans. Computers
1975, volume: 24, number: 5

1. Charles R. Kime
   Fault Tolerant Computing: An Introduction and a Perspective. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:457-460 [Journal]
   
2. Samir Kamal
   An Approach to the Diagnosis of Intermittent Faults. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:461-467 [Journal]
   
3. John F. Meyer, Robert J. Sundstrom
   On-Line Diagnosis of Unrestricted Faults. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:468-475 [Journal]
   
4. Francisco J. O. Dias
   Fault Masking in Combinational Logic Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:476-482 [Journal]
   
5. Alan M. Usas
   A Totally Self-Checking Checker Design for the Detection of Errors in Periodic Signals. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:483-489 [Journal]
   
6. Norman Benowitz, Donald F. Calhoun, Gary E. Alderson, John E. Bauer, Carl T. Joeckel
   An Advanced Fault Isolation System for Digital Logic. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:489-497 [Journal]
   
7. Albert L. Hopkins Jr., T. Basil Smith III
   The Architectural Elements of a Symmetric Fault-Tolerant Multiprocessor. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:498-505 [Journal]
   
8. T. Basil Smith III
   A Damage- and Fault-Tolerant Input/Output Network. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:505-512 [Journal]
   
9. Mu Y. Hsiao, Douglas C. Bossen
   Orthogonal Latin Square Configuration for LSI Memory Yield and Reliability Enhancement. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:5, pp:512-516 [Journal]
   
10. Barry R. Borgerson, Richard F. Freitas
    A Reliability Model for Gracefully Degrading and Standby-Sparing Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:517-525 [Journal]
    
11. Daniel P. Siewiorek
    Reliability Modeling of Compensating Module Failures in Majority Voted Redundancy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:525-533 [Journal]
    
12. Roy C. Ogus
    The Probability of a Correct Output from a Combinational Circuit. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:534-544 [Journal]
    
13. George B. Leeman Jr.
    Some Problems in Certifying Microprograms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:545-553 [Journal]
    
14. William E. Howden
    Methodology for the Generation of Program Test Data. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:554-560 [Journal]
    
15. Siu-Chong Si, Alfred K. Susskind
    A Method for Obtaining SPOOF's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:560-562 [Journal]
    
16. Chantal Robach, Gabriele Saucier
    Diversified Test Methods for Local Control Units. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:562-567 [Journal]
    
17. Dwight H. Sawin III
    Design of Reliable Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:567-570 [Journal]
    
18. John F. Wakerly
    Transient Failures in Triple Modular Redundancy Systems with Sequential Modules. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:570-573 [Journal]
    
19. Kenneth P. Parker, Edward J. McCluskey
    Analysis of Logic Circuits with Faults Using Input Signal Probabilities. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:573-578 [Journal]
    
20. Jacob A. Abraham
    A Combinatorial Solution to the Reliability of Interwoven Redundant Logic Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:5, pp:578-584 [Journal]