Journals in DBLP

IEEE Trans. Computers
1987, volume: 36, number: 2

1. Kang G. Shin, Ming-Syan Chen
   Performance Analysis of Distributed Routing Strategies Free of Ping-Pong-Type Looping. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:129-137 [Journal]
   
2. Imrich Chlamtac, Ora Ganz
   Performance Models of Asynchronous Multitrunk HYPERchannel Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:138-146 [Journal]
   
3. Hsieh S. Hou
   The Fast Hartley Transform Algorithm. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:147-156 [Journal]
   
4. Hung Chi Lai, Saburo Muroga
   Logic Networks with a Minimum Number of NOR(NAND) Gates for Parity Functions of n Variables. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:157-166 [Journal]
   
5. Patricia J. Eberlein
   On the Schur Decomposition of a Matrix for Parallel Computation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:167-174 [Journal]
   
6. Lee D. Coraor, Paul T. Hulina, Orlando A. Morean
   A General Model for Memory-Based Finite-State Machines. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:175-184 [Journal]
   
7. Kostas N. Oikonomou
   Abstractions of Finite-State Machines Optimal with Respect to Single Undetectable Output Faults. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:185-200 [Journal]
   
8. Sudhakar M. Reddy, Dong Sam Ha
   A New Approach to the Design of Testable PLA's. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:201-211 [Journal]
   
9. Agnes Hui Chan
   Using Decision Trees to Derive the Complement of a Binary Function with Multiple-Valued Inputs. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1987, v:36, n:2, pp:212-214 [Journal]
   
10. Mark G. Karpovsky
    Multilevel Logical Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:215-226 [Journal]
    
11. Keijiro Nakamura
    Inverter-Minimum Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:226-230 [Journal]
    
12. Roger W. Hockney
    Algorithmic Phase Diagrams. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:231-233 [Journal]
    
13. Harry A. G. Wijshoff, Jan van Leeuwen
    On Linear Skewing Schemes and d-Ordered Vectors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:233-239 [Journal]
    
14. Yaser S. Abu-Mostafa
    On the Time-Bandwidth Proof in VLSI Complexity. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:239-240 [Journal]
    
15. Alan A. Bertossi, Maurizio A. Bonuccelli
    A VLSI Implementation of the Simplex Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:241-247 [Journal]
    
16. Harold Fleisher, Morton Tavel, John Yeager
    A Computer Algorithm for Minimizing Reed-Muller Canonical Forms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:247-250 [Journal]
    
17. Wenlong Zang, Jack K. Wolf
    Rate 1/2 and 2/3 Majority Logic Decodable Binary Burst Error-Correcting Codes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:250-252 [Journal]
    
18. Cary K. Chin, Edward J. McCluskey
    Test Length for Pseudorandom Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:2, pp:252-256 [Journal]