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Journals in DBLP

IEEE Trans. Computers
1993, volume: 42, number: 6

  1. Janusz Rajski, Jerzy Tyszer
    Accumulator-Based Compaction of Test Responses. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:643-650 [Journal]
  2. Edward K. Lee, Randy H. Katz
    The Performance of Parity Placements in Disk Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:651-664 [Journal]
  3. Nabanita Das, Bhargab B. Bhattacharya, Jayasree Dattagupta
    Isomorphism of Conflict Graphs in Multistage Interconnection Networks and Its Application to Optimal Routing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:665-677 [Journal]
  4. Russ Miller, Viktor K. Prasanna, Dionisios I. Reisis, Quentin F. Stout
    Parallel Computations on Reconfigurable Meshes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:678-692 [Journal]
  5. Stephen E. Eldridge, Colin D. Walter
    Hardware Implementation of Montgomery's Modular Multiplication Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:693-699 [Journal]
  6. Stanislaw J. Piestrak
    The Minimal Test Set for Multioutput Threshold Circuits Implemented as Sorting Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:700-712 [Journal]
  7. Yung-Yuan Chen, Shambhu J. Upadhyaya
    Reliability, Reconfiguration, and Spare Allocation Issues in Binary-Tree Architectures Based on Multiple-Level Redundancy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:713-723 [Journal]
  8. Israel Koren, Zahava Koren, Charles H. Stapper
    A Unified Negative-Binomial Distribution for Yield Analysis of Defect-Tolerant Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:724-734 [Journal]
  9. Reuven Cohen
    One-Bit Delay in Ring Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:735-737 [Journal]
  10. Ahmed E. Kamal, V. Carl Hamacher
    Response to "One-Bit Delay in Ring Networks". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:737-738 [Journal]
  11. David Fernández-Baca, A. Medepalli
    Parametric Module Allocation on Partial k-Trees. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:738-742 [Journal]
  12. Alireza Kavianpour, Nader Bagherzadeh
    A Systematic Approch for Mapping Application Tasks in Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:742-746 [Journal]
  13. Hussein M. Alnuweiri
    A New Class of Optimal Bounded-Degree VLSI Sorting Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:746-752 [Journal]
  14. Richard Hughey
    Concurrent Error Detection on Programmable Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:752-756 [Journal]
  15. Sidney W. Graham, Steven R. Seidel
    The Cost of Broadcasting on Star Graphs and k-Ary Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:756-759 [Journal]
  16. Vitit Kantabutra
    Designing Optimum One-Level Carry-Skip Adders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:759-764 [Journal]
  17. Vijay V. Raghavan
    On Asymmetric Invalidation with Partial Tests. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:6, pp:764-768 [Journal]
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