The SCEAS System
Navigation Menu

Journals in DBLP

IEEE Trans. Computers
2003, volume: 52, number: 7

  1. Viktor K. Prasanna
    Editor's Note. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:833-834 [Journal]
  2. Ganesan Umanesan, Eiji Fujiwara
    A Class of Random Multiple Bits in a Byte Error Correcting and Single Byte Error Detecting (S_t/b EC-S_bED) Codes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:835-847 [Journal]
  3. Willi Geiselmann, Rainer Steinwandt
    A Redundant Representation of GF(q^n) for Designing Arithmetic Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:848-853 [Journal]
  4. Ramnath Duggirala, Rahul Gupta, Qing-An Zeng, Dharma P. Agrawal
    Performance Enhancements of Ad Hoc Networks with Localized Route Repair. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:854-861 [Journal]
  5. Mainak Chaudhuri, Mark Heinrich, Chris Holt, Jaswinder Pal Singh, Edward Rothberg, John L. Hennessy
    Latency, Occupancy, and Bandwidth in DSM Multiprocessors: A Performance Evaluation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:862-880 [Journal]
  6. Jack Liu, Fred C. Chow, Timothy Kong, Rupan Roy
    Variable Instruction Set Architecture and Its Compiler Support. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:881-895 [Journal]
  7. Haridimos T. Vergos, Dimitris Nikolos, Maciej Bellos, Costas Efstathiou
    Deterministic BIST for RNS Adders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:896-906 [Journal]
  8. S.-H. Gary Chan, Fouad A. Tobagi
    Modeling and Dimensioning Hierarchical Storage Systems for Low-Delay Video Services. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:907-919 [Journal]
  9. Sheng Uei Guan, Wei Liu
    Self-Modifiable Color Petri Nets for Modeling User Manipulation and Network Event Handling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:920-932 [Journal]
  10. Enrico Bini, Giorgio C. Buttazzo, Giuseppe Buttazzo
    Rate Monotonic Analysis: The Hyperbolic Bound. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:933-942 [Journal]
  11. Ugur Çetintemel, Peter J. Keleher, Bobby Bhattacharjee, Michael J. Franklin
    Deno: A Decentralized, Peer-to-Peer Object-Replication System for Weakly Connected Environments. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:943-959 [Journal]
  12. Diana Keen, Mark Oskin, Justin Hensley, Frederic T. Chong
    Cache Coherence in Intelligent Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:960-966 [Journal]
  13. Sanjoy K. Baruah, Joël Goossens
    Rate-Monotonic Scheduling on Uniform Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:966-970 [Journal]
  14. Toru Araki, Yukio Shibata
    (t, k)-Diagnosable System: A Generalization of the PMC Models. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:971-975 [Journal]
  15. Bogdan J. Falkowski
    A Comment on "Generalized Reed-Muller Forms as a Tool to Detect Symmetries". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:7, pp:975-976 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002