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Journals in DBLP

IEEE Trans. Computers
1985, volume: 34, number: 8

  1. Hao-Yung Lo, Yoshinao Aoki
    Generation of a Precise Binary Logarithm with Difference Grouping Programmable Logic Array. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:681-691 [Journal]
  2. David B. Aspinwall, Yale N. Patt
    Retrofitting the VAX-11/780 Microarchitecture for IEEE Floating Point Arithmetic - Implementation Issues, Measurements, and Analysis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:692-708 [Journal]
  3. Charles C. Wang, Trieu-Kien Truong, Howard M. Shao, Leslie J. Deutsch, Jim K. Omura, Irving S. Reed
    VLSI Architectures for Computing Multiplications and Inverses in GF(2m). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:709-717 [Journal]
  4. Anton T. Dahbura, Gerald M. Masson, Che-Liang Yang
    Self-Implicating Structures for Diagnosable Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:718-723 [Journal]
  5. Stanislaw Majerski
    Square-Rooting Algorithms for High-Speed Digital Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:724-733 [Journal]
  6. Allan L. Fisher, H. T. Kung
    Synchronizing Large VLSI Processor Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:734-740 [Journal]
  7. R. Gnanasekaran
    A Fast-Serial-Parallel Binary Multiplier. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:741-744 [Journal]
  8. Bohdan Smilauer
    General Model for Memory Interference in Mulitprocessors and Mean Value Analysis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:744-751 [Journal]
  9. C. Mani Krishna, Kang G. Shin, Ricky W. Butler
    Ensuring Fault Tolerance of Phase-Locked Clocks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:752-756 [Journal]
  10. George Marsaglia
    Note on a Proposed Test for Random Number Generators. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:756-758 [Journal]
  11. Nikolaos Gaitanis
    A Totally Self-Chicking Error Indicator. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:758-761 [Journal]
  12. Vijay Pitchumani, Edward P. Stabler
    Verification of Register Transfer Level Parallel Control Sequences. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:761-765 [Journal]
  13. Nam Sung Woo, Ashok K. Agrawala
    A Symmetric Tree Structure Interconnection Network and its Message Traffic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:765-769 [Journal]
  14. Gunnar E. Carlsson, J. E. Cruthirds, Harlan B. Sexton, C. G. Wright
    Interconnection Networks Based on a Generalization of Cube-Connected Cycles. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:769-772 [Journal]
  15. A. Yavuz Oruç, M. Yaman Oruç, Norman Balabanian
    Reconfiguration Alfoithms for Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:8, pp:773-776 [Journal]
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