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Journals in DBLP

IEEE Trans. Computers
1996, volume: 45, number: 5

  1. Michael J. Corinthios
    A Weighted Z Spectrum, Parallel Algorithm, and Processors for Mathematical Model Estimation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:513-528 [Journal]
  2. Sanguthevar Rajasekaran
    Mesh Connected Computers with Fixed and Reconfigurable Buses: Packet Routing and Sorting. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:529-539 [Journal]
  3. Sang-Bang Choi, Arun K. Somani
    Desgin and Performance Analysis of Load-Distributing Fault-Tolerant Network. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:540-551 [Journal]
  4. Manoj Franklin, Gurindar S. Sohi
    ARB: A Hardware Mechanism for Dynamic Reordering of Memory References. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:552-571 [Journal]
  5. Jong Kim, Kang G. Shin
    Execution Time Analysis of Communicating Tasks in Distributed Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:572-579 [Journal]
  6. Lizy Kurian John, Yu-Cheng Liu
    Performance Model for a Prioritized Multiple-Bus Multiprocessor System. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:580-588 [Journal]
  7. Yooichi Shintani, Toru Shonai, Hiroshi Kurokawa, Kazunori Kuriyama, Akira Yamaoka
    Hierarchical Execution to Speed Up Pipeline Interlock in Mainframe Computers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:589-599 [Journal]
  8. Prasant Mohapatra, Chansu Yu, Chita R. Das
    Allocation and Mapping Based Reliability Analysis of Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:600-606 [Journal]
  9. Rajendra S. Katti, Mario Blaum
    An Improvement on Constructions of t-EC/AUED Codes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:607-608 [Journal]
  10. Rafic A. Ayoubi, Qutaibah M. Malluhi, Magdy A. Bayoumi
    The Extended Cube Connected Cycles: An Efficient Interconnection for Massively Parallel Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:609-614 [Journal]
  11. Chor Ping Low, Hon Wai Leong
    A New Class of Efficient Algorithms for Reconfiguration of Memory Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:614-618 [Journal]
  12. Antonios Symvonis, Jonathon Tidswell
    An Empirical Study of Off-Line Permutation Packet Routing on Two-Dimensional Meshes Based on the Multistage Routing Method. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:619-625 [Journal]
  13. Yuke Wang, Carl McCrosky
    Negation Trees: A Unified Approach to Boolean Function Complementation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:626-630 [Journal]
  14. Wang-Jiunn Cheng, Wen-Tsuen Chen
    A New Self-Routing Permutation Network. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:630-636 [Journal]
  15. Behrooz Parhami
    Comments on ``High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current-Mode Circuits''. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:637-638 [Journal]
  16. Shoji Kawahito, Makoto Ishida, Tasuro Nakamura, Michitaka Kameyama, Tatsuo Higuchi
    Author's Reply. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:5, pp:639- [Journal]
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