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Journals in DBLP

IEEE Trans. Computers
1996, volume: 45, number: 4

  1. Manuel Blum, Hal Wasserman
    Reflections on the Pentium Bug. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:385-393 [Journal]
  2. Amber Roy-Chowdhury, Nikolas Bellas, Prithviraj Banerjee
    Algorithm-Based Error Detection Schemes for Iterative Solution of Partial Differential Equations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:394-407 [Journal]
  3. Shantanu Dutt, Fikri T. Assaad
    Mantissa-Preserving Operations and Robust Algorithm-Based Fault Tolerance for Matrix Computations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:408-424 [Journal]
  4. Jan-Lung Sung, G. Robert Redinbo
    Algorithm-Based Fault Tolerant Synthesis for Linear Operations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:425-438 [Journal]
  5. Mohammad H. Azadmanesh, Roger M. Kieckhafer
    New Hybrid Fault Models for Asynchronous Approximate Agreement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:439-449 [Journal]
  6. Jien-Chung Lo, Eiji Fujiwara
    Probability to Achieve TSC Goal. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:450-460 [Journal]
  7. Stanislaw J. Piestrak
    Design of Self-Testing Checkers for Borden Codes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:461-469 [Journal]
  8. Spyros Tragoudas
    Min-Cut Partitioning on Underlying Tree and Graph Structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:470-474 [Journal]
  9. Nader Bagherzadeh, Martin Dowd, Nayla Nassif
    Embedding an Arbitrary Binary Tree into the Star Graph. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:475-481 [Journal]
  10. Jovan Dj. Golic, Slobodan V. Petrovic
    Correlation Attacks on Clock-Controlled Shift Registers in Keystream Generators. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:482-486 [Journal]
  11. Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri
    Synthesis of Highly Testable Fixed-Polarity AND-XOR Canonical Networks-A Genetic Algorithm-Based Approach. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:487-490 [Journal]
  12. Hédi Nabli, Bruno Sericola
    Performability Analysis: A New Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:491-494 [Journal]
  13. C. S. Raghavendra, M. A. Sridhar
    Global Commutative and Associative Reduction Operations in Faulty SIMD Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:495-498 [Journal]
  14. V. S. S. Nair, Jacob A. Abraham, Prithviraj Banerjee
    Efficient Techniques for the Analysis of Algorithm-Based Fault Tolerance (ABFT) Schemes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:499-503 [Journal]
  15. Nitin H. Vaidya
    Comparison of Duplex and Triplex Memory Reliability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:503-507 [Journal]
  16. Sihai Xiao, Xiaofa Shih, Guilang Feng, T. R. N. Rao
    A Generalization of the Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:508-511 [Journal]
  17. Qutaibah M. Malluhi, Magdy A. Bayoumi, T. R. N. Rao
    Correction to "Efficient Mapping of ANNs on Hypercube Massively Parallel Machines". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:511- [Journal]
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