Journals in DBLP

IEEE Trans. Computers
2006, volume: 55, number: 11

1. Ian G. Harris
   Guest Editor's Introduction to the Special Section on Simulation-Based Design Validation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1313-1314 [Journal]
   
2. Domagoj Babic, Jesse D. Bingham, Alan J. Hu
   B-Cubing: New Possibilities for Efficient SAT-Solving. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1315-1324 [Journal]
   
3. Qingwei Wu, Michael S. Hsiao
   A New Simulation-Based Property Checking Algorithm Based on Partitioned Alternative Search Space Traversal. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1325-1334 [Journal]
   
4. Charles H.-P. Wen, Li-C. Wang, Kwang-Ting Cheng
   Simulation-Based Functional Test Generation for Embedded Processors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1335-1343 [Journal]
   
5. Shai Fine, Ari Freund, Itai Jaeger, Yishay Mansour, Yehuda Naveh, Avi Ziv
   Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1344-1355 [Journal]
   
6. Chia-Chih Yen, Jing-Yang Jou
   An Optimum Algorithm for Compacting Error Traces for Efficient Design Error Debugging. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1356-1366 [Journal]
   
7. Hezi Azatchi, Laurent Fournier, Eitan Marcus, Shmuel Ur, Avi Ziv, Keren Zohar
   Advanced Analysis Techniques for Cross-Product Coverage. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1367-1379 [Journal]
   
8. Patrick Schaumont, David Hwang, Shenglin Yang, Ingrid Verbauwhede
   Multilevel Design Validation in a Secure Embedded System. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1380-1390 [Journal]
   
9. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep K. Shukla
   Validating Families of Latency Insensitive Protocols. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2006, v:55, n:11, pp:1391-1401 [Journal]
   
10. Raphael C.-W. Phan, Mohammad Umar Siddiqi
    A Framework for Describing Block Cipher Cryptanalysis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:11, pp:1402-1409 [Journal]
    
11. Zeng Zeng, Bharadwaj Veeravalli
    Design and Performance Evaluation of Queue-and-Rate-Adjustment Dynamic Load Balancing Policies for Distributed Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:11, pp:1410-1422 [Journal]
    
12. Petros Oikonomakos, Mark Zwolinski
    On the Design of Self-Checking Controllers with Datapath Interactions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:11, pp:1423-1434 [Journal]
    
13. Shiann-Tsong Sheu, Yue-Ru Chuang
    A Pipeline-Based Genetic Algorithm Accelerator for Time-Critical Processes in Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:11, pp:1435-1448 [Journal]
    
14. George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis
    Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:11, pp:1449-1457 [Journal]
    
15. Jaideep Sarkar, Shamik Sengupta, Mainak Chatterjee, Samrat Ganguly
    Differential FEC and ARQ for Radio Link Protocols. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:11, pp:1458-1472 [Journal]
    
16. Dusit Niyato, Ekram Hossain
    A Queuing-Theoretic and Optimization-Based Model for Radio Resource Management in IEEE 802.16 Broadband Wireless Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:11, pp:1473-1488 [Journal]