Journals in DBLP

IEEE Trans. Computers
1983, volume: 32, number: 12

1. Vijay Pitchumani, Edward P. Stabler
   An Inductive Assertion Method for Register Transfer Level Design Verification. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1073-1080 [Journal]
   
2. Laxmi N. Bhuyan, Dharma P. Agrawal
   Design and Performance of Generalized Interconnection Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1081-1090 [Journal]
   
3. Clyde P. Kruskal, Marc Snir
   The Performance of Multistage Interconnection Networks for Multiprocessors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1091-1098 [Journal]
   
4. Krishnan Padmanabhan, Duncan H. Lawrie
   A Class of Redundant Path Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1099-1108 [Journal]
   
5. Mandayam A. Srinivas
   Optimal Parallel Scheduling of Gaussian Elimination DAG's. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1109-1117 [Journal]
   
6. Robert Geist, Kishor S. Trivedi
   Ultrahigh Reliability Prediction for Fault-Tolerant Computer Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1118-1127 [Journal]
   
7. Paul Chow, Zvonko G. Vranesic, Jui Lin Yen
   A Pipelined Distributed Arithmetic PFFT Processor. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1128-1136 [Journal]
   
8. Hideo Fujiwara, Takeshi Shimono
   On the Acceleration of Test Generation Algorithms. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1137-1144 [Journal]
   
9. Donald T. Tang, Lin S. Woo
   Exhaustive Test Pattern Generation with Constant Weight Vectors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1983, v:32, n:12, pp:1145-1150 [Journal]
   
10. Özalp Babaoglu, Domenico Ferrari
    Two-Level Replacement Decisions in Paging Stores. [Citation Graph (1, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1151-1159 [Journal]
    
11. Philip S. Liu, Tzay Y. Young
    VLSI Array Design Under Constraint of Limited I/O Bandwidth. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1160-1170 [Journal]
    
12. Clark D. Thompson
    The VLSI Complexity of Sorting. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1171-1184 [Journal]
    
13. David W. Twigg
    Transposition of Matrix Stored on Sequential File. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1185-1188 [Journal]
    
14. Steven M. Kramer, Deepinder P. Sidhu
    Security Information Flow in Multidimensional Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1188-1191 [Journal]
    
15. Ralph Grishman, Bogong Su
    A Preliminary Evaluatin of Trace Scheduling for Global Microcode Compaction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1191-1194 [Journal]
    
16. Mark G. Karpovsky
    Universal Tests for Detection of Input/Output Stuck-At and Bridging Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1194-1198 [Journal]
    
17. Jacob Savir
    Good Controllability and Observability Do Not Guarantee Good Testability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1198-1200 [Journal]
    
18. C. E. Veni Madhavan, S. Krishna
    Comments on "Optimal Design of Distributed Information Systems". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1200-1201 [Journal]
    
19. Kevin W. Bowyer, C. Frank Starmer
    Optimizing Contiguous-Element Region Selection for Virtual Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1201-1203 [Journal]
    
20. Francis Y. L. Chin, Cao An Wang
    Optimal Algorithms for the Intersection and the Minimum Distance Problems Between Planar Polygons. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1203-1207 [Journal]
    
21. Thomas J. Chaney
    Measured Flip-Flop Responses to Marginal Triggering. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1207-1209 [Journal]
    
22. Ralph Kallman
    A Faster 8-Bit Carry Circuit. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1209-1211 [Journal]
    
23. Bernard M. E. Moret, Michael G. Thomason, Rafael C. Gonzalez
    Symmetric and Threshold Boolean Functions Are Exhaustive. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1983, v:32, n:12, pp:1211-1212 [Journal]