Journals in DBLP

IEEE Trans. Computers
1997, volume: 46, number: 10

1. Ted H. Szymanski
   Design Principles for Practical Self-Routing Nonblocking Switching Networks with O(N log N) Bit-Complexity. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1057-1069 [Journal]
   
2. Antonio Fernández, Kemal Efe
   Efficient VLSI Layouts for Homogeneous Product Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1070-1082 [Journal]
   
3. Myung M. Bae, Bella Bose
   Resource Placement in Torus-Based Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1083-1092 [Journal]
   
4. Kunle Olukotun, Trevor N. Mudge, Richard B. Brown
   Multilevel Optimization of Pipelined Caches. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1083-1102 [Journal]
   
5. Odysseas I. Pentakalos, Daniel A. Menascé, Milton Halem, Yelena Yesha
   Analytical Performance Modeling of Hierarchical Mass Storage Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1103-1118 [Journal]
   
6. Arnold L. Rosenberg, Vittorio Scarano, Ramesh K. Sitaraman
   The Reconfigurable Ring of Processors: Fine-Grain Tree-Structured Computations. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1119-1131 [Journal]
   
7. Mallika De, Debasish Das, Mabhin Ghosh, Bhabani P. Sinha
   An Efficient Sorting Algorithm on the Multi-Mesh Network. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1132-1136 [Journal]
   
8. Yi-Min Wang, Yennun Huang, W. Kent Fuchs, Chandra M. R. Kintala, Gaurav Suri
   Progressive Retry for Software Failure Recovery in Message-Passing Applications. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1137-1141 [Journal]
   
9. Barry S. Fagin
   Partial Resolution in Branch Target Buffers. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1997, v:46, n:10, pp:1142-1145 [Journal]
   
10. F. Pourbigharaz, H. M. Yassine
    A Signed-Digit Architecture for Residue to Binary Transformation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:10, pp:1146-1150 [Journal]
    
11. Bruce L. Jacob, Peter M. Chen, Seth R. Silverman, Trevor N. Mudge
    A Comment on ``An Analytical Model for Designing Memory Hierarchies''. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:10, pp:1151- [Journal]