Journals in DBLP

IEEE Trans. Computers
1994, volume: 43, number: 10

1. Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin
   Area Time Trade-Offs in Micro-Grain VLSI Array Architectures. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1121-1128 [Journal]
   
2. Lizy Kurian John, Paul T. Hulina, Lee D. Coraor
   Memory Latency Effects in Decoupled Architectures. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1129-1139 [Journal]
   
3. Gideon D. Intrater, Ilan Y. Spillinger
   Performance Evaluation of a Decoded Instruction Cache for Variable Instruction Length Computers. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1140-1150 [Journal]
   
4. Kang G. Shin, Hagbae Kim
   A Time Redundancy Approach to TMR Failures Using Fault-State Likelihoods. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1151-1162 [Journal]
   
5. Dhiraj K. Pradhan, Nitin H. Vaidya
   Roll-Forward Checkpointing Scheme: A Novel Fault-Tolerant Architecture. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1163-1174 [Journal]
   
6. Michael Harrington, Arun K. Somani
   Synchronizing Hypercube Networks in the Presence of Faults. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1175-1183 [Journal]
   
7. Sameer M. Bataineh, Te-Yu Hsiung, Thomas G. Robertazzi
   Closed Form Solutions for Bus and Tree Networks of Processors Load Sharing a Divisible Job. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1184-1196 [Journal]
   
8. Jordan Gergov, Christoph Meinel
   Efficient Boolean Manipulation With OBDD's can be Extended to FBDD's. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1197-1209 [Journal]
   
9. Jehoshua Bruck, Robert Cypher, Danny Soroker
   Embedding Cube-Connected Cycles Graphs into Faulty Hypercubes. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:10, pp:1210-1220 [Journal]
   
10. Dwijendra K. Ray-Chaudhuri, N. M. Singhi, S. Sanyal, P. S. Subramanian
    Theory and Design of t-Unidirectional Error-Correcting and d-Unidirectional Error-Detecting Code. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:10, pp:1221-1226 [Journal]
    
11. R. F. Tinder, R. I. Klaus, J. A. Snodderley
    High-Speed Microprogrammable Asynchronous Controller Modules. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:10, pp:1226-1232 [Journal]
    
12. Daniel Pak-Kong Lun, Wan-Chi Siu
    A Pipeline Design for the Realization of the Prime Factor Algorithm Using the Extended Diagonal Structure. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:10, pp:1232-1237 [Journal]
    
13. J. Q. Wang, Parag K. Lala
    Partially Strongly Fault Secure and Partially Strongly Code Disjoint I-out-of-3 Code Checker. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:10, pp:1238-1240 [Journal]
    
14. Rajib K. Das, Krishnendu Mukhopadhyaya, Bhabani P. Sinha
    A New Family of Bridged and Twisted Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:10, pp:1240-1247 [Journal]