Journals in DBLP

IEEE Trans. Computers
1975, volume: 24, number: 3

1. Peter G. Neumann, T. R. N. Rao
   Error-Correcting Codes for Byte-Organized Arithmetic Processors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:226-232 [Journal]
   
2. Stephen S. Yau, Shih-Chien Yang
   Multiple Fault Detection for Combinational Logic Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:233-242 [Journal]
   
3. Oscar H. Ibarra, Sartaj Sahni
   Polynomially Complete Fault Detection Problems. [Citation Graph (1, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:242-249 [Journal]
   
4. Mohamed I. Elmasry, Philip M. Thompson
   Two-Level Emitter-Function Logic Structures for Logic-in-Memory Computers. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:250-258 [Journal]
   
5. Angelo Raffaele Meo
   Arithmetic Networks and Their Minimization Using a New Line of Elementary Units. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:258-280 [Journal]
   
6. Donald H. Foley, John W. Sammon Jr.
   An Optimal Set of Discriminant Vectors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:281-289 [Journal]
   
7. Charles S. Weaver
   Some Properties of Threshold Logic Unit Pattern Recognition Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:290-298 [Journal]
   
8. Johannes Mykkeltveit
   Generating and Counting the Double Adjacencies in a Pure Circulating Shift Register. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:299-304 [Journal]
   
9. Michal Servít
   Hazard Correction in Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1975, v:24, n:3, pp:305-310 [Journal]
   
10. Gian Carlo Bongiovanni, Fabrizio Luccio, Alessandro Zorat
    The Discrete Equation of the Straight Line. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:3, pp:310-313 [Journal]
    
11. C. K. Yuen
    Computing Robust Walsh-Fourier Transform by Error Product Minimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:3, pp:313-317 [Journal]
    
12. John Deverell
    Pipeline Iterative Arithmetic Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:3, pp:317-322 [Journal]
    
13. P. W. Baker
    Parallel Multiplicative Algorithms for Some Elementary Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:3, pp:322-325 [Journal]
    
14. C. K. Yuen
    A Note on Base -2 Arithmetic Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:3, pp:325-329 [Journal]
    
15. Russel J. Niederjohn, Philip P. Stick
    A Computer Interface for Efficient Zero-Crossing Interval Measurement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:3, pp:329-331 [Journal]
    
16. John P. Robinson, Charles W. Hoffner II
    Easily Tested Three-Level Gate Networks for T or More of N Symmetric Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:3, pp:331-335 [Journal]