Journals in DBLP
Chung-Ho Chen , Arun K. Somani Architecture Technique Trade-Offs Using Mean Memory Delay Time. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1089-1100 [Journal ] Michel Banâtre , Alain Gefflaut , Philippe Joubert , Christine Morin , Peter W. Lee An Architecture for Tolerating Processor Failures in Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1101-1115 [Journal ] Shenze Chen , Donald F. Towsley A Performance Evaluation of RAID Architectures. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1116-1130 [Journal ] Sreejit Chakravarty , Paul J. Thadikaran Simulation and Generation of IDDQ Tests for Bridging Faults in Combinational Circuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1131-1140 [Journal ] Michael Nicolaidis Theory of Transparent BIST for RAMs. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1141-1156 [Journal ] Chao Feng , Laxmi N. Bhuyan , Fabrizio Lombardi Adaptive System-Level Diagnosis for Hypercube Multiprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1157-1170 [Journal ] Zeng-ou Wang A Bidirectional Associative Memory Based on Optimal Linear Associative Memory. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1171-1179 [Journal ] Bruce L. Jacob , Peter M. Chen , Seth R. Silverman , Trevor N. Mudge An Analytical Model for Designing Memory Hierarchies. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1180-1194 [Journal ] Sartaj Sahni Scheduling Master-Slave Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1195-1199 [Journal ] Weiping Shi , Ming-Feng Chang , W. Kent Fuchs Harvest Rate of Reconfigurable Pipelines. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1200-1203 [Journal ] Yi-Chieh Chang , Kang G. Shin Load Sharing in Hypercube-Connected Multicomputers in the Presence of Node Failures. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1203-1211 [Journal ] Janusz Rajski , Jerzy Tyszer On Linear Dependencies in Subspaces of LFSR-Generated Sequences. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:10, pp:1212-1216 [Journal ]