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Journals in DBLP
- I. V. Ramakrishnan, Peter J. Varman
Modular Matrix Multiplication on a Linear Array. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:952-958 [Journal]
- Arbee L. P. Chen, Victor O. K. Li
Improvement Algorithms for Semijoin Query Processing Programs in Distributed Database Systems. [Citation Graph (8, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:959-967 [Journal]
- Alexandru Nicolau, Joseph A. Fisher
Measuring the Parallelism Available for Very Long Instruction Word Architectures. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:968-976 [Journal]
- Svetlana P. Kartashev, Steven I. Kartashev
Efficient Internode Commucations in Reconfigurable Binary Trees. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:977-990 [Journal]
- Chi-Yuan Chin, Kai Hwang
Packet Switching Networks for Multiprocessors and Data Flow Computers. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:991-1003 [Journal]
- Keki B. Irani, Ibrahim H. Önyüksel
A Closed-Form Solution for the Performance Analysis of Multiple-Bus Multiprocessor Systems. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:1004-1012 [Journal]
- Shlomo Weiss, James E. Smith
Instruction Issue Logic in Pipelined Supercomputers. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:1013-1022 [Journal]
- Hironori Kasahara, Seinosuke Narita
Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:1023-1029 [Journal]
- Utpal Banerjee, Daniel Gajski
Fast Execution of Loops with IF Statements. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:1030-1033 [Journal]
- Trevor N. Mudge, Humoud B. Al-Sadoun
Memory Interference Models with Variable Connection Time. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:1033-1038 [Journal]
- Michael J. Carey, Clark D. Thompson
An Efficient Implementation of Search Trees on (lg N + 1) Processors. [Citation Graph (2, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:1038-1041 [Journal]
- Stephen L. Stepoway, David L. Wells, Gerald R. Kane
A Multiprocessor Architecture for Generating Fractal Surfaces. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:1041-1045 [Journal]
- Daniel A. Reed
The Performance of Multimicrocomputer Networks Supporting Dynamic Workloads. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1984, v:33, n:11, pp:1045-1048 [Journal]
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