Journals in DBLP
Zvonko G. Vranesic Multiple-Valued Logic: An Introduction and Overview. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1181-1182 [Journal ] E. H. Mamdani Application of Fuzzy Logic to Approximate Reasoning Using Linguistic Synthesis. [Citation Graph (1, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1182-1191 [Journal ] J. A. Bate , Jon C. Muzio Three Cell Structures for Ternary Cellular Arrays. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1191-1202 [Journal ] André Thayse , Jean-Pierre Deschamps Logic Properties of Unate Discrete and Switching Functions. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1202-1212 [Journal ] Tatsuo Higuchi , Michitaka Kameyama Static-Hazard-Free T -Gate for Ternary Memory Element and Its Application to Ternary Counters. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1212-1221 [Journal ] Daniel Etiemble , Michel Israël Implementation of Ternary Circuits with Binary Integrated Circuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1222-1233 [Journal ] Tich T. Dao , Edward J. McCluskey , Lewis K. Russel Multivalued Integrated Injection Logic. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1233-1241 [Journal ] Richard J. Spillman , Stephen Y. H. Su Detection of Single, Stuck-Type Faulures in Multivalued Combinational Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1242-1251 [Journal ] Okihiko Ishizuka On Multivalued Multithreshold Networks Composed of Conventional Threshold Elements. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1251-1257 [Journal ] William H. Stellhorn An Inverted File Processor for Information Retrieval. [Citation Graph (4, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1258-1267 [Journal ] Shin-Yee Lu , King-sun Fu Stochastic Error-Correcting Syntax Analysis for Recognition of Noisy Patterns. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1268-1276 [Journal ] Gerard Elineau , Werner Wiesbeck An New J-K Flip-Flop for Synchronizers. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1277-1279 [Journal ] S. A. Kent A High-Speed Threshold Gate Multiplier. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1279-1283 [Journal ] D. G. Steer , S. R. Penstone Digital Hardware for Sine-Cosine Function. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1283-1286 [Journal ] C. K. Yuen A New Representation for Decimal Numbers. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1286-1288 [Journal ] Yatsuka Nakamura , Masakazu Furuya , Shoichi Sunohara An Optimal Orthogonal Expansion for Classification of Patterns. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1288-1290 [Journal ] James C. Ferguson Algorithms in Numerical Geometry System. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1290-1292 [Journal ] J. Paul Roth Hardware Verification. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1292-1294 [Journal ] Okuhiko Ishizuka Synthesis of Multithreshold Tree Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1294-1297 [Journal ] Michitaka Kameyama , Tatsuo Higuchi Synthesis of Multiple-Valued Logic Networks Based on Tree-Type Universal Logic Module. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1297-1302 [Journal ] Martin Osborne Seniority Logic: A Logic for a Committee Machine. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1302-1306 [Journal ] H. K. Ramapriyan An Algorithm for Constrained Maximization of the Trace of a Matrix. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:12, pp:1306-1308 [Journal ]