The SCEAS System
Navigation Menu

Journals in DBLP

IEEE Trans. Computers
1980, volume: 29, number: 7

  1. Kin-Man Chung, Fabrizio Luccio, C. K. Wong
    On the Complexity of Sorting in Magnetic Bubble Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:553-563 [Journal]
  2. Frances L. Van Scoy
    The Parallel Recognition of Classes of Graphs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:563-570 [Journal]
  3. Jon Louis Bentley, Derick Wood
    An Optimal Worst Case Algorithm for Reporting Intersections of Rectangles. [Citation Graph (1, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:571-577 [Journal]
  4. Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama
    A Dynamically Microprogammable Computer with Low-Level Parallelism. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:577-595 [Journal]
  5. Simon S. Lam
    Packet Broadcast Networks - A Performance Analysis of the R-ALOHA Protocol. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:596-603 [Journal]
  6. Tich T. Dao, Marc Davio, Colette Gossart
    Complex Number Arithmetic with Odd-Valued Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:604-611 [Journal]
  7. Samuel T. Chanson, Prem S. Sinha
    Optimization of Memory Hierarchies in Multiprogrammed Computer Systems With Fixed Cost Constraint. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:611-618 [Journal]
  8. Francis Y. L. Chin, K. Samson Fok
    Fast Sorting Algorithms on Uniform Ladders (Multiple Shift-Register Loops). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:618-631 [Journal]
  9. Omar Wing, John W. Huang
    A Computation Model of Parallel Solution of Linear Equations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:632-638 [Journal]
  10. Bulent I. Dervisoglu, Howard A. Sholl
    Theory and Design of Mixed-Mode Sequential Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:639-648 [Journal]
  11. John C. Sutton, Jon G. Bredeson
    Minimal Redundant Logic for High Reliability and Irredundant Testability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:648-656 [Journal]
  12. William A. Porter
    Polylogic Realization of Switching Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:657-659 [Journal]
  13. Chris R. Jesshope
    Some Results Concerning Data Routing in Array Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:659-662 [Journal]
  14. Moiez A. Tapia, Jerry H. Tucker
    Complete Solution of Boolean Equations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:662-665 [Journal]
  15. Bella Bose, T. R. N. Rao
    Separating and Completely Separating Systems and Linear Codes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:665-668 [Journal]
  16. René David
    Testing by Feedback Shift Register. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:668-673 [Journal]
  17. Jacob Savir
    Detection of Single Intermittent Faults in Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:7, pp:673-678 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002