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Journals in DBLP

IEEE Trans. Computers
2005, volume: 54, number: 10

  1. Wen-mei W. Hwu, Krishna V. Palem
    Guest Editors' Introduction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1185-1187 [Journal]
  2. Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh Seetharam, Deepaksrivats Thirumalai, Alexander G. Dean
    Supporting Demanding Hard-Real-Time Systems with STI. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1188-1202 [Journal]
  3. Ann Gordon-Ross, Frank Vahid
    Frequent Loop Detection Using Efficient Nonintrusive On-Chip Hardware. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1203-1215 [Journal]
  4. Partha Biswas, Nikil D. Dutt
    Code Size Reduction in Heterogeneous-Connectivity-Based DSPs Using Instruction Set Extensions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1216-1226 [Journal]
  5. Enric Gibert, F. Jesús Sánchez, Antonio González
    Distributed Data Cache Designs for Clustered VLIW Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1227-1241 [Journal]
  6. Alain Darte, Robert Schreiber, Gilles Villard
    Lattice-Based Memory Allocation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1242-1257 [Journal]
  7. Nathan T. Clark, Hongtao Zhong, Scott A. Mahlke
    Automated Custom Instruction Generation for Domain-Specific Processor Acceleration. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1258-1270 [Journal]
  8. Nicolas Boullis, Arnaud Tisserand
    Some Optimizations of Hardware Multiplication by Constant Matrices. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1271-1282 [Journal]
  9. Deng Pan, Yuanyuan Yang
    FIFO-Based Multicast Scheduling Algorithm for Virtual Output Queued Packet Switches. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1283-1297 [Journal]
  10. Yung-Yuan Chen
    Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1298-1313 [Journal]
  11. Zoran Dimitrijevic, Raju Rangaswami, Edward Y. Chang
    Systems Support for Preemptive Disk Scheduling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:10, pp:1314-1326 [Journal]
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