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Journals in DBLP

IEEE Trans. Computers
2006, volume: 55, number: 4

  1. Jaeheon Jeong, Michel Dubois
    Cache Replacement Algorithms with Nonuniform Miss Costs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:353-365 [Journal]
  2. Alireza Hodjat, Ingrid Verbauwhede
    Area-Throughput Trade-Offs for Fully Pipelined 30 to 70 Gbits/s AES Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:366-372 [Journal]
  3. Hongbing Fan, Yu-Liang Wu, Ray Chak-Chung Cheung, Jiping Liu
    Decomposition Design Theory and Methodology for Arbitrary-Shaped Switch Boxes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:373-384 [Journal]
  4. Shlomi Dolev, Yinnon A. Haviv
    Self-Stabilizing Microprocessor: Analyzing and Overcoming Soft Errors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:385-399 [Journal]
  5. María Engracia Gómez, Nils Agne Nordbotten, Jose Flich, Pedro López, Antonio Robles, José Duato, Tor Skeie, Olav Lysne
    A Routing Methodology for Achieving Fault Tolerance in Direct Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:400-415 [Journal]
  6. Mehmet Hakan Karaata
    Self-Stabilizing Clustering of Tree Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:416-427 [Journal]
  7. Karthik Channakeshava, Binoy Ravindran, E. Douglas Jensen
    Utility Accrual Channel Establishment in Multihop Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:428-442 [Journal]
  8. Zili Shao, Chun Xue, Qingfeng Zhuge, Mei Kang Qiu, Bin Xiao, Edwin Hsing-Mean Sha
    Security Protection and Checking for Embedded System Integration against Buffer Overflow Attacks via Hardware/Software. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:443-453 [Journal]
  9. Peng Li, Haisang Wu, Binoy Ravindran, E. Douglas Jensen
    A Utility Accrual Scheduling Algorithm for Real-Time Activities with Mutual Exclusion Resource Constraints. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:454-469 [Journal]
  10. Qiang Xu, Nicola Nicolici
    DFT Infrastructure for Broadside Two-Pattern Test of Core-Based SOCs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:470-485 [Journal]
  11. Jacek Blazewicz, Mikhail Y. Kovalyov, Maciej Machowiak, Denis Trystram, Jan Weglarz
    Preemptable Malleable Task Scheduling Problem. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:486-490 [Journal]
  12. Irith Pomeranz, Sudhakar M. Reddy
    On Generating Tests that Avoid the Detection of Redundant Faults in Synchronous Sequential Circuits with Full Scan. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:4, pp:491-495 [Journal]
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