Journals in DBLP

IEEE Trans. Computers
1984, volume: 33, number: 10

1. André Thayse
   Synthesis and Asynchronous Implementation of Algorithms Using a Generalized P-Function Concept. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:861-868 [Journal]
   
2. Hubert D. Kirrmann, Felix Kaufmann
   Poolpo - A Pool of Processors for Process Control Applications. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:869-878 [Journal]
   
3. Tsutomu Sasao
   Input Variable Assignment and Output Phase Optimization of PLA's. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:879-894 [Journal]
   
4. David Lee Tuomenoksa, Howard Jay Siegel
   Task Preloading Schemes for Reconfigurable Parallel Processing Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:895-905 [Journal]
   
5. In-Shek Hsu, Irving S. Reed, Trieu-Kien Truong, Ke Wang, Chiunn-Shyong Ye, Leslie J. Deutsch
   The VLSI Implementation of a Reed-Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:906-911 [Journal]
   
6. Joep L. W. Kessels
   Two Designs of a Fault-Tolerant Clocking System. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:912-919 [Journal]
   
7. Peter J. Varman, I. V. Ramakrishnan, Donald S. Fussell
   A Robust Matrix-Multiplication Array. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:919-922 [Journal]
   
8. Balakrishna R. Iyer, J. Bartlett Sinclair
   Dynamic Memory Interconnections for Rapid Access. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:923-927 [Journal]
   
9. C. C. Guest, M. M. Mirsalehi, Thomas K. Gaylord
   Residue Number System Truth-Table Look-Up Processing - Moduli Selection and Logical Minimization. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1984, v:33, n:10, pp:927-931 [Journal]
   
10. Maurizio A. Bonuccelli, Elena Lodi, Linda Pagli
    External Sorting in VLSI. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:10, pp:931-934 [Journal]
    
11. Ten-Chuan Hsiao, Sharad C. Seth
    An Analysis of the Use of Rademacher-Walsh Spectrum in Compact Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:10, pp:934-937 [Journal]
    
12. Robert A. Mueller, Vicki H. Allan, Joseph Varghese
    The Complexity of Horizontal Word Encoding in Microprogrammed Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:10, pp:938-939 [Journal]
    
13. A. Yavuz Oruç, Deepak Prakash
    Routing Algorithms for Cellular Interconnection Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:10, pp:939-942 [Journal]
    
14. John A. McPherson, Charles R. Kime
    Diagnosis in the Presence of Known Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:10, pp:943-947 [Journal]
    
15. Kuang-Wei Chiang, Zvonko G. Vranesic
    Comments on ``Fault Diagnosis of MOS Combinational Networks''. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:10, pp:947- [Journal]