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Journals in DBLP

IEEE Trans. Computers
1980, volume: 29, number: 8

  1. Ikuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Toru Chiba, Isao Shirakawa, Hiroshi Ozaki
    An Approach to Gate Assignment and Module Placement for Printed Wiring Boards. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:681-688 [Journal]
  2. Sheldon S. L. Chang
    Multiple-Read Single-Write Memory and Its Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:689-694 [Journal]
  3. Chuan-lin Wu, Tse-Yun Feng
    On a Class of Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:694-702 [Journal]
  4. Jan Weglarz
    Multiprocessor Scheduling with Memory Allocation - A Deterministic Approach. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:703-709 [Journal]
  5. George P. Engelberg, James A. Howard, Duncan A. Mellichamp
    Job Scheduling in a Single-Node Hierarchical Network for Process Control. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:710-719 [Journal]
  6. John F. Meyer
    On Evaluating the Performability of Degradable Computing Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:720-731 [Journal]
  7. Masaru Yamamoto
    A Method for Minimizing Incompletely Specified Sequential Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:732-736 [Journal]
  8. Janak H. Patel
    An Alternative to the Distributed Pipeline. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:736-737 [Journal]
  9. Peter Klein, Mike Paterson
    Asymtotically Optimal Circuit for a Storage Access Function. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:737-738 [Journal]
  10. Richard W. Heuft, Warren D. Little
    Convolution Computer. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:738-740 [Journal]
  11. C. K. Yuen
    Negabinary A/D Conversion. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:740-741 [Journal]
  12. Karl E. Stoffers
    Test Sets for Combinational Logic - The Edge-Tracing Approach. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:741-746 [Journal]
  13. Edward W. Page
    Minimally Testable Reed-Muller Canonical Forms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:746-750 [Journal]
  14. Jon C. Muzio
    Composite Spectra and the Analysis of Switching Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:750-753 [Journal]
  15. Norman M. Martin, Stephen P. Hufnagel
    Conditional-Sum Early Completion Adder Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:753-756 [Journal]
  16. Yakov I. Fet
    Comments on ``A Design of a Fast Cellular Associative Memory for Ordered Retrieval''. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:756-757 [Journal]
  17. Wolfgang Coy
    A Remark on the Nonminimality of Certain Multiple Fault Detection Algorithms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:8, pp:757-759 [Journal]
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