Journals in DBLP
James W. Dolter , Parameswaran Ramanathan , Kang G. Shin Performance Analysis of Virtual Cut-Through Switching in HARTS: A Hexagonal Mesh Multicomputer. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:669-680 [Journal ] Augustus K. Uht A Theory of Reduced and Minimal Procedural Dependencies. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:681-692 [Journal ] Bernard L. Menezes , Roy M. Jenevein The KYKLOS Multicomputer Network: Interconnection Strategies, Properties, and Applications. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:692-705 [Journal ] Yu-Chin Hsu , Youn-Long Lin , Hang-Ching Hsieh , Ting-Hai Chao Combining Logic Minimization and Folding for PLA's. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:706-713 [Journal ] Ten-Hwang Lai , Alan P. Sprague Placement of the Processors of a Hypercube. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:714-722 [Journal ] Weijia Shang , José A. B. Fortes Time Optimal Linear Schedules for Algorithms with Uniform Dependencies. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:723-742 [Journal ] Dhiraj K. Pradhan , Sandeep K. Gupta A New Framework for Designing and Analyzing BIST Techniques and Zero Aliasing Compression. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:743-763 [Journal ] Oscar H. Ibarra , Ting-Chuen Pong , Stephen M. Sohn Parallel Regognition and Parsing on the Hypercube. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:764-770 [Journal ] Viktor K. Prasanna , Yu-Chen Tsai On Synthesizing Optimal Family of Linear Systolic Arrays for Matrix Multiplication. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:770-774 [Journal ] Chung-Kuan Cheng , S. Z. Yao , T. C. Hu The Orientation of Modules Based on Graph Decomposition. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:774-780 [Journal ] T. C. Choinski , T. T. Tylaska Generation of Digit Reversed Address Sequences for Fast Fourier Transforms. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:780-784 [Journal ] Rafic Z. Makki , Silvio Bou-Ghazale , Chen Tianshang Automatic Test Pattern Generation with Branch Testing. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1991, v:40, n:6, pp:785-791 [Journal ]