David Gelernter A DAG-Based Algorithm for Prevention of Store-and-Forward Deadlock in Packet Networks. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1981, v:30, n:10, pp:709-715 [Journal]
Simon S. Lam, Y. C. Luke Lien Congestion Control of Packet Communication Networks by Input Buffer Limits - A Simulation Study. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1981, v:30, n:10, pp:733-742 [Journal]
Nai-Kuan Tsao Error Complexity Analysis of Algorithms for Matrix Multiplication and Matrix Chain Product. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1981, v:30, n:10, pp:758-771 [Journal]
Janak H. Patel Performance of Processor-Memory Interconnections for Multiprocessors. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1981, v:30, n:10, pp:771-780 [Journal]
J. George Shanthikumar On the Buffer Behavior with Poisson Arrivals, Priority Service, and Random Server Interruptions. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1981, v:30, n:10, pp:781-786 [Journal]
Takeo Kanai An Improvement of Reliability of Memory System with Skewing Reconfiguration. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1981, v:30, n:10, pp:811-812 [Journal]
Allan Gottlieb Comments on ``Concurrent Search and Insertion in AVL Trees''. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1981, v:30, n:10, pp:812- [Journal]