Journals in DBLP

IEEE Trans. Computers
1981, volume: 30, number: 10

1. David Gelernter
   A DAG-Based Algorithm for Prevention of Store-and-Forward Deadlock in Packet Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:709-715 [Journal]
   
2. Douglas W. Clark, Butler W. Lampson, Kenneth A. Pier
   The Memory System of a High-Performance Personal Computer. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:715-733 [Journal]
   
3. Simon S. Lam, Y. C. Luke Lien
   Congestion Control of Packet Communication Networks by Input Buffer Limits - A Simulation Study. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:733-742 [Journal]
   
4. Tse-Yun Feng, Chuan-lin Wu
   Fault-Diagnosis for a Class of Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:743-758 [Journal]
   
5. Nai-Kuan Tsao
   Error Complexity Analysis of Algorithms for Matrix Multiplication and Matrix Chain Product. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:758-771 [Journal]
   
6. Janak H. Patel
   Performance of Processor-Memory Interconnections for Multiprocessors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:771-780 [Journal]
   
7. J. George Shanthikumar
   On the Buffer Behavior with Poisson Arrivals, Priority Service, and Random Server Interruptions. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:781-786 [Journal]
   
8. C. V. Ramamoorthy, Benjamin W. Wah
   An Optimal Algorithm for Scheduling Requests on Interleaved Memories for a Pipelined Processor. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:787-800 [Journal]
   
9. Bulent I. Dervisoglu, Donald J. Criscione
   A Hard Progammable Control Unit Design Using VLSI Technology. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:10, pp:800-810 [Journal]
   
10. Takeo Kanai
    An Improvement of Reliability of Memory System with Skewing Reconfiguration. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:10, pp:811-812 [Journal]
    
11. Allan Gottlieb
    Comments on ``Concurrent Search and Insertion in AVL Trees''. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:10, pp:812- [Journal]
    
12. C. V. Ramamoorthy, Benjamin W. Wah
    The Degradation in Memory Utilization Due to Dependencies. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:10, pp:813-818 [Journal]