Journals in DBLP

IEEE Trans. Computers
2007, volume: 56, number: 1

1. Tao Li, Lizy Kurian John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Juan Rubio
   OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:2-17 [Journal]
   
2. Xiaotong Zhuang, Hsien-Hsin S. Lee
   Reducing Cache Pollution via Dynamic Data Prefetch Filtering. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:18-31 [Journal]
   
3. Kun Suk Kim, Sartaj Sahni
   Efficient Construction of Pipelined Multibit-Trie Router-Tables. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:32-43 [Journal]
   
4. Jaewook Chung, M. Anwar Hasan
   Low-Weight Polynomial Form Integers for Efficient Modular Multiplication. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:44-57 [Journal]
   
5. Mohammad J. Akhbarizadeh, Mehrdad Nourani, Rina Panigrahy, Samar Sharma
   A TCAM-Based Parallel Architecture for High-Speed Packet Forwarding. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:58-72 [Journal]
   
6. Guey-Yun Chang, Gen-Huey Chen, Gerard J. Chang
   (t, k) - Diagnosis for Matching Composition Networks under the MM* Model. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:73-79 [Journal]
   
7. Jiannong Cao, Guojun Wang, Keith C. C. Chan
   A Fault-Tolerant Group Communication Protocol in Large Scale and Highly Dynamic Mobile Next-Generation Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:80-94 [Journal]
   
8. Song Jiang, Kei Davis, Xiaodong Zhang
   Coordinated Multilevel Buffer Cache Management with Consistent Access Locality Quantification. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:95-108 [Journal]
   
9. Berk Sunar, William J. Martin, Douglas R. Stinson
   A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2007, v:56, n:1, pp:109-119 [Journal]
   
10. Anuja Sehgal, Krishnendu Chakrabarty
    Optimization of Dual-Speed TAM Architectures for Efficient Modular Testing of SOCs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:1, pp:120-133 [Journal]
    
11. Errol L. Lloyd, Guoliang Xue
    Relay Node Placement in Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:1, pp:134-138 [Journal]