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Journals in DBLP
- Madhusudhanan Anantha, Bella Bose, Luca G. Tallini
ARQ Protocols and Unidirectional Codes. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:433-443 [Journal]
- Tibor Horvath, Tarek F. Abdelzaher, Kevin Skadron, Xue Liu
Dynamic Voltage Scaling in Multitier Web Servers with End-to-End Delay Control. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:444-458 [Journal]
- Sang Seok Lim, Kyu Ho Park
TPF: TCP Plugged File System for Efficient Data Delivery over TCP. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:459-473 [Journal]
- Frank Zhigang Wang, Sining Wu, Na Helian, Michael Andrew Parker, Yike Guo, Yuhui Deng, Vineet R. Khare
Grid-Oriented Storage: A Single-Image, Cross-Domain, High-Bandwidth Architecture. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:474-487 [Journal]
- Min Lee, Euiseong Seo, Joonwon Lee, Jinsoo Kim
PABC: Power-Aware Buffer Cache Management for Low Power Consumption. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:488-501 [Journal]
- Rami G. Melhem
Low Diameter Interconnections for Routing in High-Performance Parallel Systems. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:502-510 [Journal]
- Alper Sen, Vijay K. Garg
Formal Verification of Simulation Traces Using Computation Slicing. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:511-527 [Journal]
- Andrea Fedeli, Franco Fummi, Graziano Pravadelli
Properties Incompleteness Evaluation by Functional Verification. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:528-544 [Journal]
- Xiaoyu Ruan, Rajendra S. Katti
Data-Independent Pattern Run-Length Compression for Testing Embedded Cores in SoCs. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:545-556 [Journal]
- Dong Xiang, Kaiwei Li, Jiaguang Sun, Hideo Fujiwara
Reconfigured Scan Forest for Test Application Cost, Test Data Volume, and Test Power Reduction. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:557-562 [Journal]
- Hachiro Fujita, Kohichi Sakaniwa
Modified Low-Density MDS Array Codes for Tolerating Double Disk Failures in Disk Arrays. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:563-566 [Journal]
- Dong-U Lee, John D. Villasenor
A Bit-Width Optimization Methodology for Polynomial-Based Function Evaluation. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:567-571 [Journal]
- Riyaz A. Patel, Mohammed Benaissa, Said Boussakta
Fast Modulo 2n - (2n-2+1) Addition: A New Class of Adder for RNS. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2007, v:56, n:4, pp:572-576 [Journal]
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