Le Cai, Yung-Hsiang Lu Energy management using buffer memory for streaming data. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:2, pp:141-152 [Journal]
Peng Li, Lawrence T. Pileggi Compact reduced-order modeling of weakly nonlinear analog and RF circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:2, pp:184-203 [Journal]
François Pêcheux, Christophe Lallement, Alain Vachoux VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:2, pp:204-225 [Journal]
Yoonseo Choi, Taewhan Kim, Hwansoo Han Memory layout techniques for variables utilizing efficient DRAM access modes in embedded system design. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:2, pp:278-287 [Journal]
Irith Pomeranz, Sudhakar M. Reddy On masking of redundant faults in synchronous sequential circuits with design-for-testability logic. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:2, pp:288-294 [Journal]
A. Prasad Vinod, Edmund Ming-Kit Lai On the implementation of efficient channel filters for wideband receivers by optimizing common subexpression elimination methods. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:2, pp:295-304 [Journal]
NOTICE1
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NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP