Per Andersson Design representation in Movie. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:3, pp:335-345 [Journal]
Dan Adler Switch-level simulation using dynamic graph algorithms. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:3, pp:346-355 [Journal]
Sarma Sastry, Amitava Majumdar Test efficiency analysis of random self-test of sequential circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:3, pp:390-398 [Journal]
Charles H. Stapper Statistics associated with spatial fault simulation used for evaluating integrated circuit yield enhancement. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:3, pp:399-406 [Journal]