Steven G. Duvall An interchange format for process and device simulation. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:7, pp:741-754 [Journal]
Roberto Guerrieri, Andrew R. Neureuther Simulation of microcrack effects in dissolution of positive resist exposed by X-ray lithography. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:7, pp:755-764 [Journal]
Corrado Pedron, André Stauffer Analysis and synthesis of combinational pass transistor circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:7, pp:775-786 [Journal]
Henry Cox, Janusz Rajski A method of fault analysis for test generation and fault diagnosis. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:7, pp:813-833 [Journal]
NOTICE1
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NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP