Journals in DBLP

IEEE Trans. on CAD of Integrated Circuits and Systems
1986, volume: 5, number: 2

1. Alexander Iosupovici
   A Class of Array Architectures for Hardware Grid Routers. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:245-255 [Journal]
   
2. P. A. Ruetz, Stephen P. Pope, Robert W. Brodersen
   Computer Generation of Digital Filter Banks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:256-265 [Journal]
   
3. Andrzej Peczalski, Michael S. Shur, Choong H. Hyun, Kang W. Lee, Tho Truong Vu
   Design Analysis of GaAs Direct Coupled Field Effect Transistor Logic. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:266-273 [Journal]
   
4. John P. Hayes
   Digital Simulation with Multiple Logic Values. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:274-283 [Journal]
   
5. Choong H. Hyun, Michael S. Shur, Nicholas C. Cirillo Jr.
   Simulation and Design Analysis of (A1Ga)As/GaAs MODFET Integrated Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:284-292 [Journal]
   
6. M. Sugimoto, M. Fukuma
   Standard Description Form for Device Characteristics in VLSI's. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:293-302 [Journal]
   
7. Nripendra N. Biswas
   Computer-Aided Minimization Procedure for Boolean Functions. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:303-304 [Journal]
   
8. Charles A. Zukowski
   Relaxing Bounds for Linear RC Mesh Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:305-312 [Journal]
   
9. Norio Kuji, Teruo Tamama, M. Nagatani
   FINDER: A CAD System-Based Electron Beam Tester for Fault Diagnosis of VLSI Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:313-319 [Journal]
   
10. W. Maes, Kristin M. De Meyer, Luc H. Dupas
    SIMPAR: A Versatile Technology Independent Parameter Extraction Program Using a New Optimized Fit-Strategy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:320-325 [Journal]
    
11. C. C. Moglestue
    A Self-Consistent Monte Carlo Particle Model to Analyze Semiconductor Microcomponents of any Geometry. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:326-345 [Journal]
    
12. Leszek J. Opalski, M. A. Styblinski
    Generalization of Yield Optimization Problem: Maximum Income Approach. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:2, pp:346-360 [Journal]