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Journals in DBLP

IEEE Trans. on CAD of Integrated Circuits and Systems
2002, volume: 21, number: 11

  1. Thanwa Sripramong, Christofer Toumazou
    The invention of CMOS amplifiers using genetic programming and current-flow analysis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1237-1252 [Journal]
  2. Murali Kudlugi, Russell Tessier
    Static scheduling of multidomain circuits for fast functional verification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1253-1268 [Journal]
  3. Hans M. Jacobson, Chris J. Myers
    Efficient algorithms for exact two-level hazard-free logic minimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1269-1283 [Journal]
  4. Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli
    Dynamic frequency scaling with buffer insertion for mixed workloads. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1284-1305 [Journal]
  5. Carlo Brandolese, Fabio Salice, William Fornaciari, Donatella Sciuto
    Static power modeling of 32-bit microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1306-1316 [Journal]
  6. Tony Givargis, Frank Vahid
    Platune: a tuning framework for system-on-a-chip platforms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1317-1327 [Journal]
  7. Kuo-Liang Cheng, Ming-Fu Tsai, Cheng-Wen Wu
    Neighborhood pattern-sensitive fault testing and diagnostics for random-access memories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1328-1336 [Journal]
  8. Ian G. Harris, Russell Tessier
    Testing and diagnosis of interconnect faults in cluster-based FPGA architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1337-1343 [Journal]
  9. Yu-Min Lee, Charlie Chung-Ping Chen
    Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1343-1352 [Journal]
  10. Philippe Maurine, Mustapha Rezzoug, Nadine Azémard, Daniel Auvergne
    Transition time modeling in deep submicron CMOS. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1352-1363 [Journal]
  11. Gang Qu
    Publicly detectable watermarking for intellectual property authentication in VLSI design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1363-1368 [Journal]
  12. Mehmet Can Yildiz, Patrick H. Madden
    Preferred direction Steiner trees. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1368-1372 [Journal]
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The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
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