Journals in DBLP

IEEE Trans. on CAD of Integrated Circuits and Systems
1988, volume: 7, number: 10

1. Albertus J. Kemp, Jacobus A. Pretorius, Willem Smit
   The generation of a mesh for resistance calculation in integrated circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1029-1037 [Journal]
   
2. Sepuan Yu, A. F. Franz, T. G. Mihran
   A physical parametric transistor model for CMOS circuit simulation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1038-1052 [Journal]
   
3. Tian-Shen Tang, M. A. Styblinski
   Yield optimization for nondifferentiable density functions using convolution techniques. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1053-1067 [Journal]
   
4. Laung-Terng Wang, Edward J. McCluskey
   Circuits for pseudoexhaustive test pattern generation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1068-1080 [Journal]
   
5. Hi-Keung Tony Ma, Srinivas Devadas, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
   Test generation for sequential circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1081-1093 [Journal]
   
6. Jason Cong, Martin D. F. Wong, C. L. Liu
   A new approach to three- or four-layer channel routing. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1094-1104 [Journal]
   
7. Micaela Serra, Jon C. Muzio
   Space compaction for multiple-output circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1105-1113 [Journal]
   
8. Fabrizio Lombardi, Donatella Sciuto, Renato Stefanelli
   An algorithm for functional reconfiguration of fixed-size arrays. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1114-1118 [Journal]
   
9. Wolfgang O. Budde
   Modular testprocessor for VLSI chips and high-density PC boards. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1118-1124 [Journal]