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Journals in DBLP

IEEE Trans. on CAD of Integrated Circuits and Systems
1989, volume: 8, number: 5

  1. Gerhard Hobler, Siegfried Selberherr
    Monte Carlo simulation of ion implantation into two- and three-dimensional structures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:450-459 [Journal]
  2. Martin D. Giles
    Defect-coupled diffusion at high concentrations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:460-467 [Journal]
  3. Gen-Lin Tan, Xiao-Li Yuan, Qi-Ming Zhang, Walter H. Ku, An-Jui Shey
    Two-dimensional semiconductor device analysis based on new finite-element discretization employing the S-G scheme. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:468-478 [Journal]
  4. Josef F. Burgler, Randolph E. Bank, Wolfgang Fichtner, R. Kent Smith
    A new discretization scheme for the semiconductor current continuity equations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:479-489 [Journal]
  5. Paolo Ciampolini, Alessandro Forghieri, Anna Pierantoni, Antonio Gnudi, Massimo Rudan, Giorgio Baccarani
    Adaptive mesh generation preserving the quality of the initial grid. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:490-500 [Journal]
  6. Carl L. Gardner, Joseph W. Jerome, Donald J. Rose
    Numerical methods for the hydrodynamic device model: subsonic flow. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:501-507 [Journal]
  7. T. D. Linton Jr., P. A. Blakey
    A fast, general three-dimensional device simulator and its application in a submicron EPROM design study. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:508-515 [Journal]
  8. Jue-Hsien Chern, John T. Maeda, Lawrence A. Arledge Jr., Ping Yang
    SIERRA: a 3-D device simulator for reliability modeling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:516-527 [Journal]
  9. Ke-Chi Wu, Robert F. Lucas, Ze-Yi Wang, Robert W. Dutton
    New approaches in a 3-D one-carrier device solver. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:528-537 [Journal]
  10. Hal R. Yeager, Robert W. Dutton
    Improvement in norm-reducing Newton methods for circuit simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:538-546 [Journal]
  11. Youn-Sik Hong, Kyu Ho Park, Myunghwan Kim
    A heuristic algorithm for ordering the columns in one-dimensional logica arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:547-562 [Journal]
  12. Joseph JáJá, S. Alice Wu
    On routing two-terminal nets in the presence of obstacles. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:563-570 [Journal]
  13. Niraj K. Jha
    Separable codes for detecting unidirectional errors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:571-574 [Journal]
  14. J. T. Mowchenko
    A lower bound on channel density after global routing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:5, pp:574-577 [Journal]
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