Journals in DBLP

IEEE Trans. on CAD of Integrated Circuits and Systems
1985, volume: 4, number: 2

1. A. M. Patel, N. L. Soong, R. K. Korn
   Hierarchical VLSI Routing - An Approximate Routing Procedure. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:2, pp:121-126 [Journal]
   
2. R. F. Vogel
   Analytical MOSFET Model with Easily Extracted Parameters. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:2, pp:127-134 [Journal]
   
3. Emil F. Girczyc, Raymond J. A. Buhr, John P. Knight
   Applicability of a Subset of Ada as an Algorithmic Hardware Description Language for Graph-Based Hardware Compilation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:2, pp:134-142 [Journal]
   
4. N. N. Chan, Robert W. Dutton
   Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:2, pp:143-149 [Journal]
   
5. Martine D. F. Schlag, Ellen J. Yoffa, Peter S. Hauge, Chak-Kuen Wong
   A Method for Improving Cascode-Switch Macro Wirability. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:2, pp:150-155 [Journal]
   
6. Wojciech Maly, Zygmunt Pizlo
   Tolerance Assignment for IC Selection Tests. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:2, pp:156-162 [Journal]