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Journals in DBLP

IEEE Trans. on CAD of Integrated Circuits and Systems
1994, volume: 13, number: 7

  1. Balkrishna Ramkumar, Prithviraj Banerjee
    ProperCAD: A portable object-oriented parallel environment for VLSI CAD. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:829-842 [Journal]
  2. D. L. Springer, Donald E. Thomas
    Exploiting the special structure of conflict and compatibility graphs in high-level synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:843-856 [Journal]
  3. Siu-Wing Cheng, Hsi-Chuan Chen, David Hung-Chang Du, Andrew Lim
    The role of long and short paths in circuit performance optimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:857-864 [Journal]
  4. June-Kyung Rho, Fabio Somenzi
    Don't care sequences and the optimization of interacting finite state machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:865-874 [Journal]
  5. Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Circuit structure relations to redundancy and delay. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:875-883 [Journal]
  6. Shun-Shii Lin
    Constant-time algorithms for the channel assignment problem on processor arrays with reconfigurable bus systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:884-890 [Journal]
  7. Xiaoyu Song, Xuehou Tan
    An optimal channel-routing algorithm in the times square model. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:891-898 [Journal]
  8. Woo-Sung Choi, Jae-Gyung Ahn, Young-June Park, Hong-Shick Min, Chang-Gyu Hwang
    A time dependent hydrodynamic device simulator SNU-2D with new discretization scheme and algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:899-908 [Journal]
  9. Li-Ren Liu, David Hung-Chang Du, Hsi-Chuan Chen
    An efficient parallel critical path algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:909-919 [Journal]
  10. Vivek Chickermane, Jaushin Lee, Janak H. Patel
    Addressing design for testability at the architectural level. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:920-934 [Journal]
  11. Rochit Rajsuman
    A new testing method for EEPLA. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:935-939 [Journal]
  12. Jos van Sas, Francky Catthoor, Hugo De Man
    Cellular automata based deterministic self-test strategies for programmable data paths. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:940-949 [Journal]
  13. Sharad Malik
    Analysis of cyclic combinational circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:950-956 [Journal]
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