Lars W. Hagen, Andrew B. Kahng New spectral methods for ratio cut partitioning and clustering. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:9, pp:1074-1085 [Journal]
Xiaodong Zhang Dynamic and static load balancing for solving block bordered circuit equations on multiprocessors. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:9, pp:1086-1094 [Journal]
Peter M. Maurer Two new techniques for unit-delay compiled simulation. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:9, pp:1120-1130 [Journal]
Larry G. Jones An incremental zero/integer delay switch-level simulation environment. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:9, pp:1131-1139 [Journal]
Weiping Shi, W. Kent Fuchs Probabilistic analysis and algorithms for reconfiguration of memory arrays. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:9, pp:1153-1160 [Journal]