Journals in DBLP

IEEE Trans. on CAD of Integrated Circuits and Systems
1989, volume: 8, number: 10

1. Mehmet A. Cirit
   The Meyer model revisited: why is charge not conserved? [MOS transistor]. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1033-1037 [Journal]
   
2. James B. Kuo, Tsen-Shau Yang, Robert W. Dutton, Bruce A. Wooley
   Two-dimensional transient analysis of a collector-up ECL inverter. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1038-1045 [Journal]
   
3. Naoyuki Shigyo, T. Wada, Seiji Yasuda
   Discretization problem for multidimensional current flow. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1046-1050 [Journal]
   
4. Paul F. Cox, Richard Burch, Ping Yang, Dale E. Hocevar
   New implicit integration method for efficient latency exploitation in circuit simulation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1051-1064 [Journal]
   
5. C.-P. Wan, B. J. Sheu
   Temperature dependence modeling for MOS VLSI circuit simulation. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1065-1073 [Journal]
   
6. André Ivanov, Vinod K. Agarwal
   An analysis of the probabilistic behavior of linear feedback signature registers. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1074-1088 [Journal]
   
7. James L. Olivier, Füsun Özgüner
   Design of concurrent error-detecting systolic arrays using |g 3N|_M codes. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1089-1099 [Journal]
   
8. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
   A synthesis and optimization procedure for fully and easily testable sequential machines. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1100-1107 [Journal]
   
9. Youn-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai
   SILK: a simulated evolution router. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1108-1114 [Journal]
   
10. Robert A. Walker, Donald E. Thomas
    Behavioral transformation for algorithmic level IC design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1115-1128 [Journal]