Yehea I. Ismail, Eby G. Friedman DTT: direct truncation of the transfer function - an alternative tomoment matching for tree structured interconnect. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:2, pp:131-144 [Journal]
Zhaoyun Xing, Russell Kao Shortest path search using tiles and piecewise linear costpropagation. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:2, pp:145-158 [Journal]
Stephen A. Edwards An Esterel compiler for large control-dominated systems. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:2, pp:169-183 [Journal]
Khurram Muhammad, Kaushik Roy A graph theoretic approach for synthesizing very low-complexityhigh-speed digital filters. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:2, pp:204-216 [Journal]
Patrick H. Madden Reporting of standard cell placement results. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:2, pp:240-247 [Journal]
NOTICE1
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NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP