Journals in DBLP

IEEE Trans. on CAD of Integrated Circuits and Systems
2004, volume: 23, number: 11

1. Dmitri Maslov, Gerhard W. Dueck
   Reversible cascades with minimal garbage. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1497-1509 [Journal]
   
2. Bogdan Tutuianu, Ross Baldick, Mark S. Johnstone
   Nonlinear driver models for timing and noise analysis. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1510-1521 [Journal]
   
3. Hua Xiang, Xiaoping Tang, Martin D. F. Wong
   Bus-driven floorplanning. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1522-1530 [Journal]
   
4. Kyeong Keol Ryu, Vincent John Mooney III
   Automated bus generation for multiprocessor SoC design. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1531-1549 [Journal]
   
5. Li-C. Wang, Jing-Jia Liou, Kwang-Ting Cheng
   Critical path selection for delay fault testing based upon a statistical timing model. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1550-1565 [Journal]
   
6. Jennifer L. Wong, Rupak Majumdar, Miodrag Potkonjak
   Fair watermarking using combinatorial isolation lemmas. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1566-1574 [Journal]
   
7. Dipanjan Gope, Vikram Jandhyala
   Oct-tree-based multilevel low-rank decomposition algorithm for rapid 3-D parasitic extraction. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1575-1580 [Journal]
   
8. Safar Hatami, M. Yaser Azizi, Hamid-Reza Bahrami, Davoud Motavalizadeh-Naeini, Ali Afzali-Kusha
   Accurate and efficient modeling of SOI MOSFET with technology independent neural networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1580-1587 [Journal]
   
9. Irith Pomeranz, Sudhakar M. Reddy
   Vector-restoration-based static compaction using random initial omission. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1587-1592 [Journal]
   
10. David J. Walkey, Tom J. Smy, Dritan Celo, Tom W. MacElwee, Michael C. Maliepaard
    Compact, netlist-based representation of thermal transient coupling using controlled sources. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:11, pp:1593-1596 [Journal]