Journals in DBLP

ACM Trans. Embedded Comput. Syst.
2006, volume: 5, number: 2

1. Ahmed Amine Jerraya, Trevor N. Mudge
   Guest editorial: Concurrent hardware and software design for multiprocessor SoC. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:259-262 [Journal]
   
2. Jiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar
   A design methodology for application-specific networks-on-chip. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:263-280 [Journal]
   
3. Tero Kangas, Petri Kukkala, Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen, Jouni Riihimäki, Kimmo Kuusilinna
   UML-based multiprocessor SoC design framework. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:281-320 [Journal]
   
4. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
   Energy-efficient embedded software implementation on multiprocessor system-on-chip with multiple voltages. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:321-341 [Journal]
   
5. Fabiano Hessel, Vitor M. da Rosa, Carlos Eduardo Reif, César A. M. Marcon, Tatiana Gadelha Serra Dos Santos
   Scheduling refinement in abstract RTOS models. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:342-354 [Journal]
   
6. Jingzhao Ou, Viktor K. Prasanna
   Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:355-382 [Journal]
   
7. Mirko Loghi, Massimo Poncino, Luca Benini
   Cache coherence tradeoffs in shared-memory MPSoCs. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:383-407 [Journal]
   
8. James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu
   A new efficient EDA tool design methodology. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:408-430 [Journal]
   
9. Mehrdad Reshadi, Nikil Dutt, Prabhat Mishra
   A retargetable framework for instruction-set architecture simulation. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:431-452 [Journal]
   
10. Gokhan Memik, William H. Mangione-Smith
    Evaluating Network Processors using NetBench. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:453-471 [Journal]
    
11. Sumesh Udayakumaran, Angel Dominguez, Rajeev Barua
    Dynamic allocation for scratch-pad memory using compile-time decisions. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:472-511 [Journal]