Journals in DBLP
Mauricio Ayala-Rincón , Carlos H. Llanos , Ricardo P. Jacobi , Reiner W. Hartenstein Prototyping time- and space-efficient computations of algebraic operations over dynamically reconfigurable systems modeled by rewriting-logic. [Citation Graph (0, 0)][DBLP ] Journal ] Javed Absar , Francky Catthoor Reuse analysis of indirectly indexed arrays. [Citation Graph (0, 0)][DBLP ] Journal ] Ali Dasdan , Ivan Hom Handling inverted temperature dependence in static timing analysis. [Citation Graph (0, 0)][DBLP ] Journal ] Zuoyuan Li , Xianlong Hong , Qiang Zhou , Jinian Bian , Hannah Honghua Yang , Vijay Pitchumani Efficient thermal-oriented 3D floorplanning and thermal via planning for two-stacked-die integration. [Citation Graph (0, 0)][DBLP ] Journal ] Saravanan Padmanaban , Spyros Tragoudas Implicit grading of multiple path delay faults. [Citation Graph (0, 0)][DBLP ] Journal ] Deming Chen , Jason Cong , Junjuan Xu Optimal simultaneous module and multivoltage assignment for low power. [Citation Graph (0, 0)][DBLP ] Journal ] Haikun Zhu , Chung-Kuan Cheng , Ronald L. Graham On the construction of zero-deficiency parallel prefix circuits with minimum depth. [Citation Graph (0, 0)][DBLP ] Journal ] Mahmut T. Kandemir Reducing energy consumption of multiprocessor SoC architectures by exploiting memory bank locality. [Citation Graph (0, 0)][DBLP ] Journal ] Fei Su , Sule Ozev , Krishnendu Chakrabarty Concurrent testing of digital microfluidics-based biochips. [Citation Graph (0, 0)][DBLP ] Journal ] David Atienza , Jose Manuel Mendias , Stylianos Mamagkakis , Dimitrios Soudris , Francky Catthoor Systematic dynamic memory management design methodology for reduced memory footprint. [Citation Graph (0, 0)][DBLP ] Journal ] Wei Li , Daniel Blakely , Scott Van Sooy , Keven Dunn , David Kidd , Robert Rogenmoser , Dian Zhou LVS verification across multiple power domains for a quad-core microprocessor. [Citation Graph (0, 0)][DBLP ] Journal ] Jason A. Cheatham , John M. Emmert , Stanley Baumgart A survey of fault tolerant methodologies for FPGAs. [Citation Graph (0, 0)][DBLP ] Journal ] 