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Journals in DBLP

ACM Trans. Design Autom. Electr. Syst.
2001, volume: 6, number: 1

  1. Smita Bakshi, Daniel Gajski
    Performance-constrained hierarchical pipelining for behaviors, loops, and operations. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:1-25 [Journal]
  2. Krishnendu Chakrabarty
    Optimal test access architectures for system-on-a-chip. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:26-49 [Journal]
  3. Rita Yu Chen, Mary Jane Irwin, Raminder Singh Bajwa
    Architecture-level power estimation and design experiments. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:50-66 [Journal]
  4. Pao-Ann Hsiung
    POSE: a parallel object-oriented synthesis environment. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:67-92 [Journal]
  5. Ing-Jer Huang
    Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:93-121 [Journal]
  6. Evaggelinos P. Mariatos, Alexios N. Birbas, Michael K. Birbas
    A mapping algorithm for computer-assisted exploration in the design of embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:122-147 [Journal]
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