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Journals in DBLP
- Smita Bakshi, Daniel Gajski
Performance-constrained hierarchical pipelining for behaviors, loops, and operations. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:1-25 [Journal]
- Krishnendu Chakrabarty
Optimal test access architectures for system-on-a-chip. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:26-49 [Journal]
- Rita Yu Chen, Mary Jane Irwin, Raminder Singh Bajwa
Architecture-level power estimation and design experiments. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:50-66 [Journal]
- Pao-Ann Hsiung
POSE: a parallel object-oriented synthesis environment. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:67-92 [Journal]
- Ing-Jer Huang
Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:93-121 [Journal]
- Evaggelinos P. Mariatos, Alexios N. Birbas, Michael K. Birbas
A mapping algorithm for computer-assisted exploration in the design of embedded systems. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2001, v:6, n:1, pp:122-147 [Journal]
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