Journals in DBLP

ACM Trans. Design Autom. Electr. Syst.
2002, volume: 7, number: 3

1. Chung-Wen Albert Tsao, Cheng-Kok Koh
   UST/DME: a clock tree router for general skew constraints. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:3, pp:359-379 [Journal]
   
2. Apostolos A. Kountouris, Christophe Wolinski
   Efficient scheduling of conditional behaviors for high-level synthesis. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:3, pp:380-412 [Journal]
   
3. Frank Vahid
   Partitioning sequential programs for CAD using a three-step approach. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:3, pp:413-429 [Journal]
   
4. Viktor S. Lapinskii, Margarida F. Jacome, Gustavo de Veciana
   Cluster assignment for high-performance embedded VLIW processors. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:3, pp:430-454 [Journal]
   
5. Vikram Saxena, Farid N. Najm, Ibrahim N. Hajj
   Estimation of state line statistics in sequential circuits. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:3, pp:455-473 [Journal]
   
6. Alexey Glebov, Sergey Gavrilov, David Blaauw, Vladimir Zolotov
   False-noise analysis using logic implications. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:3, pp:474-498 [Journal]