Journals in DBLP
Aiqun Cao , Ruibing Lu , Chen Li 0004 , Cheng-Kok Koh Postlayout optimization for synthesis of Domino circuits. [Citation Graph (0, 0)][DBLP ] Journal ] André C. Nácul , Tony Givargis Synthesis of time-constrained multitasking embedded software. [Citation Graph (0, 0)][DBLP ] Journal ] Kunhyuk Kang , Bipul C. Paul , Kaushik Roy Statistical timing analysis using levelized covariance propagation considering systematic and random variations of process parameters. [Citation Graph (0, 0)][DBLP ] Journal ] Wu-An Kuo , TingTing Hwang , Allen C.-H. Wu Decomposition of instruction decoders for low-power designs. [Citation Graph (0, 0)][DBLP ] Journal ] Yi-Yu Liu , Kuo-Hua Wang , TingTing Hwang Crosstalk minimization in logic synthesis for PLAs. [Citation Graph (0, 0)][DBLP ] Journal ] Sezer Gören , F. Joel Ferguson Test sequence generation for controller verification and test with high coverage. [Citation Graph (0, 0)][DBLP ] Journal ] Zhong-Zhen Wu , Shih-Chieh Chang Multiple wire reconnections based on implication flow graph. [Citation Graph (0, 0)][DBLP ] Journal ] Chi-Shong Wang , Chingwei Yeh Performance-driven technology mapping with MSG partition and selective gate duplication. [Citation Graph (0, 0)][DBLP ] Journal ] 