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Journals in DBLP

ACM Trans. Design Autom. Electr. Syst.
1998, volume: 3, number: 3

  1. Gianpiero Cabodi, Paolo Camurati, Stefano Quer
    Auxiliary variables for BDD-based representation and manipulation of Boolean functions. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:3, pp:309-340 [Journal]
  2. Jason Cong, Andrew B. Kahng, Cheng-Kok Koh, Chung-Wen Albert Tsao
    Bounded-skew clock and Steiner routing. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:3, pp:341-388 [Journal]
  3. Wen-Ben Jone, K. S. Tsai
    Confidence analysis for defect-level estimation of VLSI random testing. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:3, pp:389-407 [Journal]
  4. Anmol Mathur, Ali Dasdan, Rajesh K. Gupta
    Rate analysis for embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:3, pp:408-436 [Journal]
  5. Peichen Pan, C. L. Liu
    Optimal clock period FPGA technology mapping for sequential circuits. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:3, pp:437-462 [Journal]
  6. Michael A. Riepe, Karem A. Sakallah
    The edge-based design rule model revisited. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:3, pp:463-486 [Journal]
  7. Alan Su 0002, Yu-Chin Hsu, Ta-Yung Liu, Mike Tien-Chien Lee
    Eliminating false loops caused by sharing in control path. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:3, pp:487-495 [Journal]
  8. Hai Zhou, D. F. Wong
    Optimal river routing with crosstalk constraints. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:3, pp:496-514 [Journal]
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