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Journals in DBLP
- Christian Piguet, Narayanan Vijaykrishnan
Guest Editorial. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:129-130 [Journal]
- Rajeev R. Rao, Ashish Srivastava, David Blaauw, Dennis Sylvester
Statistical analysis of subthreshold leakage current for VLSI circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:131-139 [Journal]
- Afshin Abdollahi, Farzan Fallah, Massoud Pedram
Leakage current reduction in CMOS VLSI circuits by input vector control. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:140-154 [Journal]
- Dongwoo Lee, David Blaauw, Dennis Sylvester
Gate oxide leakage current analysis and reduction for VLSI circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:155-166 [Journal]
- Nam Sung Kim, Krisztián Flautner, David Blaauw, Trevor N. Mudge
Circuit and microarchitectural techniques for reducing cache leakage power. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:167-184 [Journal]
- Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic
Level conversion for dual-supply systems. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:185-195 [Journal]
- Narender Hanchate, Nagarajan Ranganathan
LECTOR: a technique for leakage reduction in CMOS circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:196-205 [Journal]
- Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jeffrey P. Kao
The Chimaera reconfigurable functional unit. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:206-217 [Journal]
- Meng-Da Yang, An-Yeu Wu, Jyh-Ting Lai
High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:218-226 [Journal]
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