Journals in DBLP

IEEE Trans. VLSI Syst.
2005, volume: 13, number: 10

1. Noureddine Chabini, Wayne Wolf
   Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraints. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1113-1126 [Journal]
   
2. Hua Wang, Miguel Miranda, Antonis Papanikolaou, Francky Catthoor, Wim Dehaene
   Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1127-1135 [Journal]
   
3. Mahmut T. Kandemir, Mary Jane Irwin, Guangyu Chen, Ibrahim Kolcu
   Compiler-guided leakage optimization for banked scratch-pad memories. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1136-1146 [Journal]
   
4. Nam Sung Kim, David Blaauw, Trevor N. Mudge
   Quantitative analysis and optimization techniques for on-chip cache leakage power. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1147-1156 [Journal]
   
5. Vijay Degalahal, Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
   Soft errors issues in low-power caches. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1157-1166 [Journal]
   
6. Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake
   Two-dimensional position detection system with MEMS accelerometers, readout circuitry, and microprocessor for padless mouse applications. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1167-1178 [Journal]
   
7. Zachary K. Baker, Viktor K. Prasanna
   A computationally efficient engine for flexible intrusion detection. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1179-1189 [Journal]
   
8. Russell Tessier, David Jasinski, Atul Maheshwari, Aiyappan Natarajan, Weifeng Xu, Wayne P. Burleson
   An energy-aware active smart card. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1190-1199 [Journal]
   
9. Daihyun Lim, Jae W. Lee, Blaise Gassend, G. Edward Suh, Marten van Dijk, Srinivas Devadas
   Extracting secret keys from integrated circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1200-1205 [Journal]
   
10. Y. Abulafia, Avner Kornfeld
    Estimation of FMAX and ISB in microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:10, pp:1205-1209 [Journal]