Journals in DBLP

Microprocessors and Microsystems
2006, volume: 30, number: 1

1. T. K. Priya, K. Sridharan
   A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2006, v:30, n:1, pp:1-14 [Journal]
   
2. Taskin Koçak, Jacob Engel
   A high throughput 3D-bus interconnect for network processors. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2006, v:30, n:1, pp:15-25 [Journal]
   
3. A. Jameel, Mohammed Yakoob Siyal, N. Ikram
   A robust secure speech communication system using ITU-T G.723.1 and TMS320C6711 DSP. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2006, v:30, n:1, pp:26-32 [Journal]
   
4. Sukwon Choi, Hojung Cha, Rhan Ha
   A selective DVS technique based on battery residual. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2006, v:30, n:1, pp:33-42 [Journal]
   
5. Fernando J. Álvarez, Álvaro Hernández, Jesús Ureña, Manuel Mazo, Juan Jesús García, J. Antonio Jiménez, Ana Jiménez
   Real-time implementation of an efficient correlator for complementary sets of four sequences appl to ultrasonic pulse compression systems. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2006, v:30, n:1, pp:43-51 [Journal]
   
6. Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi
   An integrated temporal partitioning and physical design framework for static compilation of reconfigurable computing systems. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2006, v:30, n:1, pp:52-62 [Journal]