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Journals in DBLP

Microprocessors and Microsystems
2006, volume: 30, number: 4

  1. Qingfeng Zhuge, Chun Xue, Zili Shao, Meilin Liu, Meikang Qiu, Edwin Hsing-Mean Sha
    Design optimization and space minimization considering timing and code size via retiming and unfolding. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:4, pp:173-183 [Journal]
  2. K. M. M. Prabhu, G. Ghurumuruhan
    Transform decomposition method of pruning the FHT algorithms. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:4, pp:184-188 [Journal]
  3. Tao Li, Lizy Kurian John
    Operating system power minimization through run-time processor resource adaptation. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:4, pp:189-198 [Journal]
  4. M. Reza Javaheri, Reza Sedaghat, Leo Kant, Jason Zalev
    Verification and fault synthesis algorithm at switch-level. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:4, pp:199-208 [Journal]
  5. Jung-Wook Park, Gi-Ho Park, Sung-Bae Park, Shin-Dug Kim
    A deterministic way-prediction scheme using power-aware replacement policy. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:4, pp:209-215 [Journal]
  6. Rajkiran Gottumukkal, Hau T. Ngo, Vijayan K. Asari
    Multi-lane architecture for eigenface based real-time face recognition. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:4, pp:216-224 [Journal]
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