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Journals in DBLP

Microprocessors and Microsystems
2002, volume: 26, number: 3

  1. Ernesto Martins, Paulo Neves, José Alberto Fonseca
    Architecture of a fieldbus message scheduler coprocessor based on the planning paradigm. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:26, n:3, pp:97-106 [Journal]
  2. Jonas Jalminger, Per Stenström
    Improvement of energy-efficiency in off-chip caches by selective prefetching. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:26, n:3, pp:107-121 [Journal]
  3. Vesa Lahtinen, Kimmo Kuusilinna, Tero Kangas, Timo Hämäläinen
    Interconnection scheme for continuous-media systems-on-a-chip. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:26, n:3, pp:123-138 [Journal]
  4. Gregor Papa, Jurij Silc
    Automatic large-scale integrated circuit synthesis using allocation-based scheduling algorithm. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:26, n:3, pp:139-147 [Journal]
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