Journals in DBLP

Microelectronics Reliability
2001, volume: 41, number: 12

1. Alexander Ambatiello, Josef Deichler
   Low and high temperature device reliability investigations of buried p-channel MOSFETs of a 0.17 mum technology. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1915-1921 [Journal]
   
2. Gennadi Bersuker, Yongjoo Jeon, Howard R. Huff
   Degradation of thin oxides during electrical stress. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1923-1931 [Journal]
   
3. M. Da Rold, E. Simoen, S. Mertens, M. Schaekers, G. Badenes, S. Decoutere
   Impact of gate oxide nitridation process on 1/f noise in 0.18 mum CMOS. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1933-1938 [Journal]
   
4. Zhenqiu Ning, Yuri Sneyders, Wim Vanderbauwhede, Renaud Gillon, Marnix Tack, Paul Raes
   A compact test structure for characterisation of leakage currents in sub-micron CMOS technologies. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1939-1945 [Journal]
   
5. Z. Chobola
   Noise as a tool for non-destructive testing of single-crystal silicon solar cells. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1947-1952 [Journal]
   
6. Jin He, Xing Zhang, Ru Huang, Yangyuan Wang
   Extraction of the lateral distribution of interface traps in MOSFETs by a novel combined gated-diode technique. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1953-1957 [Journal]
   
7. B. P. Yan, Y. F. Yang, C. C. Hsu, H. B. Lo, E. S. Yang
   A reliability comparison of InGaP/GaAs HBTs with and without passivation ledge. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1959-1963 [Journal]
   
8. D. Fedasyuk, E. Levus, D. Petrov
   Flip-chip structure transient thermal model. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1965-1970 [Journal]
   
9. Piotr Dziurdzia, Andrzej Kos
   Monitoring of power dissipated in microelectronic structures. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2001, v:41, n:12, pp:1971-1978 [Journal]
   
10. Xingsheng Liu, Shuangyan Xu, Guo-Quan Lu, David A. Dillard
    Stacked solder bumping technology for improved solder joint reliability. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:1979-1992 [Journal]
    
11. P. L. Tu, Y. C. Chan, K. C. Hung
    Reliability of microBGA assembly using no-flow underfill. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:1993-2000 [Journal]
    
12. Shyh-Ming Chang, Jwo-Huei Jou, Adam Hsieh, Tai-Hong Chen, Ching-Yun Chang, Yung-Hao Wang, Chun-Ming Huang
    Characteristic study of anisotropic-conductive film for chip-on-film packaging. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:2001-2009 [Journal]
    
13. W. D. Zhuang, P. C. Chang, F. Y. Chou, R. K. Shiue
    Effect of solder creep on the reliability of large area die attachment. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:2011-2021 [Journal]
    
14. Mykola Blyzniuk, Irena Kazymyra, Wieslaw Kuzmicz, Witold A. Pleskacz, Jaan Raik, Raimund Ubar
    Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:2023-2040 [Journal]
    
15. S. Dordevic, P. Petkovic
    A hierarchical approach to large circuit symbolic simulation. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:2041-2049 [Journal]
    
16. Robert I. Damper, Richard L. B. French, Tom W. Scutt
    The Hi-NOON neural simulator and its applications. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:2051-2065 [Journal]
    
17. Bharatwaj Ramakrishnan, Peter Sandborn, Michael G. Pecht
    Process capability indices and product reliability. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:2067-2070 [Journal]
    
18. M. C. Poon, Y. Gao, T. C. W. Kok, A. M. Myasnikov, Hei Wong
    SIMS study of silicon oxynitride prepared by oxidation of silicon-rich silicon nitride layer. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:2071-2074 [Journal]