Journals in DBLP

Microelectronics Reliability
2002, volume: 42, number: 6

1. Wolfgang Wondrak
   Special Section on Reliability of Passive Components. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:805- [Journal]
   
2. Reiner W. Kuehl
   Reliability of thin-film resistors: impact of third harmonic screenings. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:807-813 [Journal]
   
3. Jonathan L. Paulsen, Erik K. Reed
   Highly accelerated lifetesting of base-metal-electrode ceramic chip capacitors. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:815-820 [Journal]
   
4. Erik K. Reed, Jonathan L. Paulsen
   Impact of circuit resistance on the breakdown voltage of tantalum chip capacitors. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:821-827 [Journal]
   
5. Jocelyn Siplon, Gary J. Ewell, Thomas Gibson
   ESR concerns in tantalum chip capacitors exposed to non-oxygen-containing environments. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:829-834 [Journal]
   
6. A. Dehbi, W. Wondrak, Y. Ousten, Y. Danto
   High temperature reliability testing of aluminum and tantalum electrolytic capacitors. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:835-840 [Journal]
   
7. Jan Pavelka, Josef Sikula, Petr Vasina, Vlasta Sedlakova, Munecazu Tacano, Sumihisa Hashiguchi
   Noise and transport characterisation of tantalum capacitors. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:841-847 [Journal]
   
8. Petr Vasina, T. Zednicek, Josef Sikula, Jan Pavelka
   Failure modes of tantalum capacitors made by different technologies. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:849-854 [Journal]
   
9. Gregory L. Amorese
   Minimizing equivalent series resistance measurement errors. [Citation Graph (0, 0)][DBLP]
   Microelectronics Reliability, 2002, v:42, n:6, pp:855-860 [Journal]
   
10. Markus P. J. Mergens
    On-Chip ESD. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:861- [Journal]
    
11. Ming-Dou Ker, Chyh-Yih Chang
    ESD protection design for CMOS RF integrated circuits using polysilicon diodes. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:863-872 [Journal]
    
12. Cynthia A. Torres, James W. Miller, Michael Stockinger, Matthew D. Akers, Michael G. Khazhinsky, James C. Weldon
    Modular, portable, and easily simulated ESD protection networks for advanced CMOS technologies. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:873-885 [Journal]
    
13. Craig Salling, Jerry Hu, Jeff Wu, Charvaka Duvvury, Roger Cline, Rith Pok
    Development of substrate-pumped nMOS protection for a 0.13 mum technology. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:887-899 [Journal]
    
14. Bart Keppens, V. De Heyn, M. Natarajan Iyer, Vesselin K. Vassilev, Guido Groeseneken
    Significance of the failure criterion on transmission line pulse testing. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:901-907 [Journal]
    
15. Jon Barth, John Richner
    Correlation considerations: Real HBM to TLP and HBM testers. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:909-917 [Journal]
    
16. Leo G. Henry, Jon Barth, Hugh Hyatt, Tom Diep, Michael Stevens
    Charged device model metrology: limitations and problems. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:919-927 [Journal]
    
17. P. G. Han, Hei Wong, Andy H. P. Chan, M. C. Poon
    A novel approach for fabricating light-emitting porous polysilicon films. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:929-933 [Journal]
    
18. E. Miranda, G. Redin, A. Faigón
    Modeling of the I-V characteristics of high-field stressed MOS structures using a Fowler-Nordheim-type tunneling expression. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:935-941 [Journal]
    
19. Thomas D. Moore, John L. Jarvis
    The effects of in-plane orthotropic properties in a multi-chip ball grid array assembly. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:943-949 [Journal]
    
20. Masazumi Amagai, Masako Watanabe, Masaki Omiya, Kikuo Kishimoto, Toshikazu Shibuya
    Mechanical characterization of Sn-Ag-based lead-free solders. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:951-966 [Journal]
    
21. Afaq Ahmad
    Investigation of a constant behavior of aliasing errors in signature analysis due to the use of different ordered test-patterns in LFSR based testing techniques. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:967-974 [Journal]
    
22. Tomasz Garbolino, Andrzej Hlawiczka
    Efficient test pattern generators based on specific cellular automata structures. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:975-983 [Journal]
    
23. Fuchen Mu, Mingzhen Xu, Changhua Tan, Xiaorong Duan
    Weibull characteristics of n-MOSFET's with ultrathin gate oxides under FN stress and lifetime prediction. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:985-989 [Journal]
    
24. Lingfeng Mao, Changhua Tan, Mingzhen Xu
    Erratum to "The effect of image potential on electron transmission and electric current in the direct tunneling regime of ultra-thin MOS structures" [Microelectronics Reliability 2001;41: 927-931]. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:991- [Journal]
    
25. Ninoslav Stojadinovic
    Dependability of Engineering Systems: J.M. Nahman, Springer-Verlag, Berlin, Heidelberg, New York, 2002, 192 pages. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2002, v:42, n:6, pp:993- [Journal]